|
Standard
Advanced
|
| Maximum
layer Count
|
12
layers
|
up
to 24 layers
|
| Minimum
trace width
|
|
|
|
½ oz copper
|
.005”
|
.003”
|
|
1 oz copper
|
.007”
|
.004”
|
|
2 oz copper
|
.015”
|
.010”
|
| Minimum
space
|
|
|
|
½ oz copper
|
.006”
|
.004”
|
|
1 oz copper
|
.007”
|
.006”
|
|
2 oz copper
|
.010”
|
.008”
|
| Minimum
finished via hole size
|
.010”
|
.005”
|
| Minimum
finished via pad size
|
.025”
|
.018”
|
| Maximum
drill aspect ratio
|
8
to 1
|
10
to 1
|
| Controlled
impedance tolerance
|
+/-10%
|
+/-5%
|
| Minimum
thickness tolerance
|
+/-10%
or .007”
|
+/-5%
or .004”
|
| Minimum
finished boards thickness
|
.031”
|
.012”
|
| Minimum
Plated through hole tolerance
|
+/-.003”
|
+/-.002”
|
| Minimum
Non plated hole tolerance
|
+/-.002”
|
+/-.001”
|
| Minimum
routing tolerance
|
+/-.005”
|
+/-.003”
|
| Minimum
warpage tolerance
|
.010”
/ inch
|
.007”/
inch
|
| Minimum
solder mask clearance
|
.005”
|
.002”
|
| Minimum
internal clearance
|
.018”
|
.015”
|
| Minimum
dielectric spacing
|
.005”
|
.002”
|
| Legend
line width
|
.010”
|
.006"
|
Fabrication
notes:
1.Part Number and revision level.
2.Artwork revision information if it differs from the
drawing information.
3.Outside board dimensions, including tolerances.
4.Finished thickness and tolerance.
5.A hole chart including: symbols, specify plated and
or non-plated, hole diameters and tolerances. The symbol
for each hole' size shall correspond with the symbol
on the view of the board.
6.Layers sequence.
7.Dielectric spacing requirements.
8.Copper weight of each layer.
9.Type of laminate.
10.Type and Color of solder mask.
11.Final finished requirement.
12.Any additional mechanical dimension requirements.
Tenting Via holes:
If Liquid Photo Image (LPI) solder mask is required,
we advise that the via holes not be tented. Tenting
the via holes with LPI solder mask will result in the
following problems: incomplete encapsulation of the
via hole, exposed copper/metal on via holes, Solder
on via hole pads and in holes, uncured solder
mask in the holes, which result in peeling of LPI and
trapping contamination inside the holes.
The solder mask pads for via holes can be made about
5 mils bigger than the via drill size. This will result
in deposition of solder in the via holes, reduce the
possibility of bridging problems during wave soldering
operation.
If the via plugging is used to fill open holes with
the solder mask to block air leakage during In Circuit
Test, via plugged one side is the suggested.
PCMCIA Cards notes:
The most common thickness specified for these cards
is 0.018 +/- 0.002 inches.
We prefer that you specify the maximum thickness, and
suggest it should be 0.019 inches for memory, fax/modem
cards. Also, the thickness shall be measured from mask
to mask.
The pad sizes of via holes for outer layers should
be at least 0.018 inches. This allows us to drill 0.010"
holes. The minimum annular ring criterion of IPC-600E
will not be met, but no breakout can be guaranteed.
We prefer to do tear dropping (snow-man) to all the
via pads. This will provide at least 3 mils annular
ring where the trace connects to the via pads.
We hope the above mentioned design guidelines are of
some help to you. If you need additional information
or have any questions, suggestions please feel free
to contact us at (408) 727-4125.
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